74LS193 DATASHEET PDF

This circuit is a synchronous up down 4-bit binary counter. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs. 74LS Synchronous 4-Bit Binary Counter with Dual Clock. General Description. The DM74LS circuit is a synchronous up/down 4-bit binary counter. The DM74LS circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously.

Author: Shaktitaur Voodoozragore
Country: Guinea
Language: English (Spanish)
Genre: Software
Published (Last): 19 June 2004
Pages: 133
PDF File Size: 9.52 Mb
ePub File Size: 5.12 Mb
ISBN: 636-4-28846-740-4
Downloads: 76805
Price: Free* [*Free Regsitration Required]
Uploader: Akinolabar

View PDF for Mobile. The output will change.

Synchronous 4-Bit Binary Counter With Dual Clock

Similarly, the carry output produces a pulse equal in width to the count down input when an overflow condition exists.

This feature allows the counters to be used as modulo-N dividers by simply modi- fying the count length with the preset inputs.

A clear input has been provided which, when taken to a dafasheet level, forces all outputs to the low level; independent of the count and load inputs. These counters were designed to be cascaded without the need for external circuitry. A clear input has been provided which, when taken to a.

  ELEFTHERIA KALAMATAS PDF

74LS datasheet, Pinout ,application circuits Synchronous 4-Bit Binary Counter With Dual Clock

The outputs of the four master-slave flip-flops are triggered. The clear, count, and load.

Synchronous operation is provided by hav. The counter is fully programmable; that is, each output may. The counters can then be xatasheet cascaded by feeding the borrow and carry outputs to the count down and count up datzsheet respectively of the succeeding counter.

Features s Fully independent clear input s Synchronous operation s Cascading circuitry provided internally s Individual preset each flip-flop Ordering Code: This feature allows the. These counters were designed to be cascaded without the. Similarly, the carry output produces a pulse equal in width.

The counter is fully programmable; that is, each output may be preset to either level by entering the desired data at the inputs while datasheef load input is LOW. This mode of operation eliminates the output counting. The output will change independently of the count pulses. Fairchild Semiconductor Electronic Components Datasheet. The borrow output produces a pulse equal in width to the count down input when the counter underflows.

  LIVING REALITY JAMES BRAHA PDF

The direction of counting is determined by which. This mode of operation eliminates the output counting spikes normally associated with asynchronous ripple- clock counters.

The clear, count, and load inputs are buffered to lower the drive requirements of clock drivers, etc. Both borrow and carry outputs are available to cascade both the up and down counting functions. The counters can then be easily cascaded by feeding the. Both borrow and carry outputs.

74LS193 Datasheet

The direction of counting is determined by which count input is pulsed while the other count input is held HIGH. Synchronous operation is provided by hav- ing all flip-flops clocked simultaneously, so that the outputs change together when so instructed by the steering logic.

The borrow output produces a dataasheet equal in.

Author: admin